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3GSM: Intel, ADI bet on 2.5/3G cell, PDA fusionBy Patrick Mannion
They will be joining Texas Instruments, STMicroelectronics, Motorola, Philips and others who are committing themselves to similar platforms, some being demonstrated at the 3GSM World Congress in Cannes, France. At stake is a burgeoning market for second-generation and 2.5G smart phones and PDAs that is still wide open, the historical dominance of TI and Motorola notwithstanding.
"It's all about offering choices," said Doug Grant, RF business director at Analog Devices Inc. (Norwood, Mass.), referring to the Smartphone2002 platform developed by Microsoft Corp., around which ADI has compiled two solutions, derived from two partnerships. "Up until now all you had was TI and Omap and whatever radio they were recommending. Now you have TI, Intel/ADI or ADI/NeoMagic, with differentiation based on feature set, power and cost of BOM [bill of materials]."
Intel believes its trump card is the PXA800F (Manitoba) processor, an integration trifecta of DSP, Xscale processor and flash memory as well as power management features. The DSP is the MicroSignal Architecture (MSA) that Intel co-developed with ADI under the code name Frio. (ADI promises its own Frio-based solution for Edge systems, the next spin of GSM, next month.) For the RF section, Intel is using ADI's OthelloOne direct-conversion radio.
ADI has used the partnership with Intel and another with NeoMagic Corp. to devise two solutions centering on Microsoft's Smartphone2002 platform. Both leverage ADI's RF, mixed-signal and baseband GSM/GPRS expertise.
The collaborative design effort with Intel links ADI's OthelloOne and SoftFone General Packet Radio Service baseband chip set with TTPCom's GPRS protocol stack and Intel's PXA262 Xscale applications processor. The second links the SoftFone, OthelloOne and TTPCom stack with NeoMagic's MiMagic 3 applications processor as well as ADI's own power-management expertise.
Highly optimized for video processing, MiMagic 3 is aimed at mobile applications with multimedia requirements. It features a 12-channel DMA-enabled bus structure with parallel instruction/data fetches and an on-chip frame buffer that eliminates external memory accesses to lower power consumption and accelerate video processing.
ADI also announced its entry into the power amplifier market last week. This is not another me-too power amp, Grant said, but an integrated PA/"true" power-measurement chip that offers enhanced call control and thereby increases battery life.
Inevitable comparisons
With the architectural disclosures now complete going into Cannes, comparisons are inevitable, particularly with regard to Intel. The most generalized comparisons center on the level of parallelism and, therefore, power consumption for multimedia applications, as well as the integration level.
For the latter, Intel apparently has come up trumps. The PXA800F comprises a 312-MHz Xscale applications processor with 4 Mbytes of on-chip flash and 512 kbytes of SRAM, and a 104-MHz MSA baseband DSP with 512 kbytes of flash and 64 kbytes of SRAM. An integrated power-management unit and hardware audio codec is also provided, co-developed with Dialog Semiconductor.
The Layer 1 protocol was internally developed for the MSA, while Intel opted for TTPCom's mature and type-approved GSM/GPRS Layer 2/3 stack to run on the Xscale. The chip uses a 0.13-micron process and integrates a plethora of I/O options. Dennis Sheehan, director of marketing for Intel's PCA components group, said it will be priced at $35 each per 10,000 to fit the target market of $100 to $200 smart phones and low-end PDAs. "For the market projections [for smart phones and PDAs] to become reality, the trick will be to make the functionality interesting to the user and get it into the mainstream price points," he said.
The chip is sampling now as a Class 12 GPRS solution in a 13-mm2 ball grid array. When combined with ADI's front end, it should achieve a talk time of three hours, Sheehan said. Intel also partnered with RF Micro Devices for the power amplifier and with Electrobit for a reference design that will be available in the second quarter, he said.
"Intel is used to selling into the hundred million-unit per year markets, and what other market besides disk-drive controllers are selling hundred-million units? Cellular is it," said Will Strauss of market research house Forward Concepts.
Jeff Bier of Berkeley Design Technology Inc., a DSP technology analysis firm, described the PXA800F as "not something you just whip up overnight. They're demonstrating their commitment."
Intel is the only company offering an integrated DSP, flash and general-purpose processor, though other players have various combinations of the three. Integrating memory brings faster access through wider memory interfaces, space savings and lower power, Sheehan said. The memory is Intel's single-bit-per-cell technology, although Sheehan expects the company to use its multibit-per-cell StrataFlash technology in the next generation.
While long touted as a coup de grāce by Intel, the integrated flash may be only a temporary advantage, said analyst Strauss. As the industry moves toward 3G, it will become necessary to stack memory, he said. At that point, Intel will be joining TI and STMicroelectronics, which have already outlined plans to stack memory (SDRAM or mobile double-data-rate DRAM for TI and flash for ST).
The race is already on for alternative memories to bring to the party, with TI pursuing high-density, low-power, non-volatile ferroelectric memory and companies such as NEC and Samsung placing bets on magnetoresistive RAM.
Task-loading options
When it comes to multimedia processing on mobile devices, there are two philosophies: insert task-specific hardware coprocessors (such as a DSP) to offload the intensive video processing from the host RISC CPU, or juice up the applications processor and let it rip.
Abiding by the first philosophy is TI's Omap architecture, the latest versions of which use an ARM926TEJ for the general control functions and a C55x DSP for the multimedia processing. ST's Nomadik processor also uses DSP-based coprocessors. Differentiation boils down to two factors: the level of coupling between the host and coprocessor, and how quickly data can be shuffled between processors and memory.
With coprocessors, the more parallel-processing elements there are, the lower the clock frequency required, thereby keeping a tight rein on power. "Also," Strauss said, "one thing you don't want to do in real-time multimedia is have really deep pipelines, since you have to flush them out."
Intel skipped parallel processing in favor of a souped-up 315-MHz Xscale, relying on that processor's vaunted voltage- and frequency-scaling capabilities for power management. The Xscale also runs an optimized Java Virtual Machine that fits on the on-chip flash. "All this will give more data downloaded from the carriers to generate revenue," Sheehan said.
But there comes a point of diminishing returns with this approach. A high clock rate squeezes the battery, and it gets worse at 3G. Intel has promised to add the multimedia-oriented MMX instruction set to Xscale to tackle the power problem.
As video-processing demands increase on mobile devices, the amount of available memory and its usage model become critical. "One image scan be a couple hundred kilobytes," said Bier of Berkeley Design, "so at 15 frames per second, you're looking at megabytes per second just to move video around."
The 512 kbytes of flash and 64 kbytes of SRAM for the MSA baseband processor are significant to Bier, since "the SRAM will have a big role to play in keeping the processor fed." Meanwhile the 512 kbytes of SRAM for the Xscale are "a pretty generous amount, but the key is what kind of mechanisms they have for DMA [direct memory access] between the flash and SRAM in the background, so the processor is always working out of SRAM and always finding what it needs there."
Details on the memory architecture and its access were not available from Intel.
While some might view Analog Devices' partnership with Intel as Faustian, ADI's Grant said it's "nice to see [Intel] use the core we developed with them, and the more sockets they win for Othello, the better leverage we have going forward." But he does view the use of MSA as overkill for GSM/GPRS. ADI's own baseband currently uses the company's homegrown 218x DSP; the Frio DSP will show up in March in a solution for Enhanced Data Rates for GSM Evolution (Edge) equipment.
Despite Grant's enthusiasm, Strauss urged that ADI exercise caution with respect to Intel. "As an Indian friend once said to me: When you walk next to an elephant, you have to be careful where you step," he said.
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